Abstract
Optical serial communications are a key enabler for development of Artificial Intelligence. Internet of Things, Big Data, Cloud storage and Computing are all driving a continuous demand for bandwidth and innovation in semiconductors and optical technologies. Marvell, a leading fabless semiconductor supplier and global leader in electro-optics communication products, will deliver a tech talk about optical Analog to Digital Converter (ADC) based serial links receivers.
The talk will focus on receivers as well as ADC design from architecture to circuit level highlighting the challenges and trade off when designing high speed Analog to digital converters and sampling analog front end in 5nm FinFET processes and beyond.
Speakers
Alessio Di Pasquo (Questo indirizzo email è protetto dagli spambots. È necessario abilitare JavaScript per vederlo.) received his Bachelor’s and master’s degrees in electronic engineering at the University of Pisa in 2017 and 2019 respectively. He then researched high-speed and high linearity track and hold circuits as a Ph.D. student at the University of Pisa in collaboration with Marvell Pavia. Right after finishing his Ph.D. in November 2022, he started working for Marvell on analog front end and ADC for SerDes applications.
Gabriele Caporale (Questo indirizzo email è protetto dagli spambots. È necessario abilitare JavaScript per vederlo.): received the Bachelor’s degree in Biomedical Engineering and the Master’s degree in Electronic Engineering at University of Pisa in 2021 and 2024 respectively. For his Master’s degree thesis, he did an internship at Marvell focused on the study and design of Distributed Amplifiers for high speed optical communication. Since November 2024 he is with Marvell in the TX analog design group
Claudio Nani (Questo indirizzo email è protetto dagli spambots. È necessario abilitare JavaScript per vederlo.) was born in Brescia, Italy, in 1983. He received the M.Sc. degree in electrical engineering from the University of Pisa, Pisa, Italy, and Scuola Superiore Sant’Anna, Pisa, in 2007 and 2008, respectively. From 2007 to 2010, he was with NXP Research, Eindhoven, The Netherlands, where he was working on high-speed ADC for cable tuners applications. In 2010, he joined Marvell, Pavia, Italy. In 2017, he joined eSilicon, Pavia, where he was working on high-performance analog-to-digital converter (ADC) design and analog front end for wireline interfaces. Since 2020 he is with Marvell (former Inphi), Pavia where he is technical director of the RX analog design group leading the development of high-speed data converters for optical DSP applications. His current research interests include high speed power-efficient ADCs, data converter digital calibration systems, and high-performance wireline interfaces. Since 2022 he is member of Technical Program Committee of the European Solid State Electronics Research Conference (ESSERC former ESSCIRC).